1. Field of the Invention
Embodiments of the invention relate generally to semiconductor memory devices. More particularly, embodiments of the invention relate to NOR flash memory devices and programming methods for such devices.
A claim of priority is made to Korean Patent Application No. 2005-68561 filed on Jul. 27, 2005, the subject matter of which is hereby incorporated by reference in its entirety.
2. Description of Related Art
Semiconductor memory devices generally store and read data, and may be classified as random access memories (RAMs) and read only memories (ROMs). RAMs are volatile memory devices that lose their stored data when power is interrupted. ROMs are non-volatile memory devices that continuously hold stored data even when power is interrupted. RAMs include dynamic RAM (DRAM) and static RAM (SRAM). ROMs include programmable ROM (PROM), erasable PROM (EPROM), electrically EPROM (EEPROM), and flash memory.
Flash memories may be classified into two types, NAND and NOR, in accordance with the logical configuration of their constituent memory cells. NOR flash memory devices are characterized by high speed programming and read operations and are commonly used to store application code. As such, NOR flash memory is commonly used in potable host devices such as mobile phones.
In common conventional form, a flash memory cell is connected between a bitline and a source line and to a wordline. Multiple flash memory cells may be connected to one wordline. Depending on a voltage applied to a given wordline, the connected flash memory cells may be sensed as ON-cell or OFF-cell. The term, “ON-cell” designates a flash memory cell that is turned ON when its corresponding wordline receives a voltage higher than its threshold voltage. In this condition, the flash memory cell allows current to flow. The term “OFF-cell” designates a flash memory cell that is turned OFF when its corresponding wordline receives a voltage lower than its threshold voltage. In this condition, the flash memory cell does not allow current to flow above some incident level.
Conventional NOR flash memory generally requires that a program verification operation be carried out following a program operation. The program verification operation functionally verifies whether or not the threshold voltage of a flash memory cell has reached a desired level. In addition, the program verification operation determines whether or not the program operation has been successful by applying a program verification voltage to the wordline and sensing current flow (or not) from the flash memory cell.
The conventional program verification operation is simultaneously performed across a plurality (or block) of memory cells, (e.g., 128 memory cells). However, within a block of programmed memory cells, some memory cells require program verification and some do not. For example, a memory cell may not require program verification if it is in a state lower than another defined state for programmed memory cells, or if the memory cell is a program-passed memory cell.
If a great many memory cells require program verification, a large amount of current flows in relation to these memory cells. In such cases, the voltage applied to the various connected source lines will increase, and threshold voltages for memory cells within the block of memory cells undergoing program verification may be inadvertently interpreted in an erroneous manner.
For example, if one assumes the use of memory cells having four programmable states, (“11”, “10”, “01”, and “00”), some memory cells may exist in the “11” state and others in the “01” state within the context of a program verification operation. A large amount of current flowing as a result of the presence of memory cells in the “11” state may increase the voltage apparent on source lines associated with the memory cells in the “01” state, for example.